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» High Level Synthesis Of Multi-Precision Data Flow Graphs
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PAMI
2006
132views more  PAMI 2006»
13 years 7 months ago
A Generative Sketch Model for Human Hair Analysis and Synthesis
In this paper, we present a generative sketch model for human hair analysis and synthesis. We treat hair images as 2D piecewisely smooth vector (flow) fields, and thus our represe...
Hong Chen, Song Chun Zhu
ICCAD
1992
IEEE
137views Hardware» more  ICCAD 1992»
13 years 11 months ago
Equivalent design representations and transformations for interactive scheduling
High-level synthesis (HLS) requires more designer interaction to better meet the needs of experienced designers. However, attempts to create a highly interactive synthesis process...
Roger P. Ang, Nikil D. Dutt
CODES
2004
IEEE
13 years 10 months ago
Hardware synthesis from coarse-grained dataflow specification for fast HW/SW cosynthesis
This paper concerns automatic hardware synthesis from data flow graph (DFG) specification for fast HW/SW cosynthesis. A node in DFG represents a coarse grain block such as FIR and...
Hyunuk Jung, Soonhoi Ha
DAC
2003
ACM
14 years 8 months ago
Data communication estimation and reduction for reconfigurable systems
Widespread adoption of reconfigurable devices requires system level synthesis techniques to take an application written in a high level language and map it to the reconfigurable d...
Adam Kaplan, Philip Brisk, Ryan Kastner
SASP
2008
IEEE
183views Hardware» more  SASP 2008»
14 years 1 months ago
Application Acceleration with the Explicitly Parallel Operations System - the EPOS Processor
Different approaches have been proposed over the years for automatically transforming High-Level-Languages (HLL) descriptions of applications into custom hardware implementations. ...
Alexandros Papakonstantinou, Deming Chen, Wen-mei ...