Sciweavers

83 search results - page 6 / 17
» High Level Synthesis for Data-Driven Applications
Sort
View
DATE
2009
IEEE
176views Hardware» more  DATE 2009»
14 years 2 months ago
Automated synthesis of streaming C applications to process networks in hardware
Abstract—The demand for embedded computing power is continuously increasing and FPGAs are becoming very interesting computing platforms, as they provide huge amounts of customiza...
Sven van Haastregt, Bart Kienhuis
FPL
2009
Springer
132views Hardware» more  FPL 2009»
13 years 11 months ago
Binary Synthesis with multiple memory banks targeting array references
High-Level Synthesis (HLS) is the field of transforming a high-level programming language, such as C, into a register transfer level(RTL) description of the design. In HLS, Binary...
Yosi Ben-Asher, Nadav Rotem
RSP
2005
IEEE
155views Control Systems» more  RSP 2005»
14 years 1 months ago
Optimization Techniques for ADL-Driven RTL Processor Synthesis
Nowadays, Architecture Description Languages (ADLs) are getting popular to speed up the development of complex SoC design, by performing the design space explon a higher level of ...
Oliver Schliebusch, Anupam Chattopadhyay, Ernst Ma...
ICRA
2008
IEEE
297views Robotics» more  ICRA 2008»
14 years 1 months ago
Fast 3D reconstruction of human shape and motion tracking by parallel fast level set method
— This paper presents a parallel algorithm of the Level Set Method named the Parallel Fast Level Set Method, and its application for real-time 3D reconstruction of human shape an...
Yumi Iwashita, Ryo Kurazume, Kenji Hara, Seiichi U...
ASPDAC
2005
ACM
146views Hardware» more  ASPDAC 2005»
13 years 9 months ago
High-level synthesis for DSP applications using heterogeneous functional units
Abstract— This paper addresses high level synthesis for realtime digital signal processing (DSP) architectures using heterogeneous functional units (FUs). For such special purpos...
Zili Shao, Qingfeng Zhuge, Chun Xue, Bin Xiao, Edw...