We introduce Branch Predictor Prediction (BPP) as a power-aware branch prediction technique for high performance processors. Our predictor reduces branch prediction power dissipat...
Modern embedded systems often require high degrees of instruction-level parallelism (ILP) within strict constraints on power consumption and chip cost. Unfortunately, a high-perfo...
DRAM systems achieve high performance when all DRAM banks are busy servicing useful memory requests. The degree to which DRAM banks are busy is called DRAM Bank-Level Parallelism ...
The problem of optimization of subband coders for given input statistics has received considerable attention in recent literature. The goal in these works has been to maximize the...
This paper describes a system being developed to recognize date information handwritten on Canadian bank cheques. A segmentation based strategy is adopted in this system. In order...