It is a challenge to implement large word length public-key algorithms on embedded systems. Examples are smartcards, RF-ID tags and mobile terminals. This paper presents a HW/SW c...
In this paper, a double precision IEEE 754 floating-point multiplier with high speed and low power is presented. The bottleneck of any double precision floatingpoint multiplier des...
Himanshu Thapliyal, Vishal Verma, Hamid R. Arabnia
In our research project named “Mega-Scale Computing Based on Low-Power Technology and Workload Modeling”, we have been developing a prototype cluster not based on ASIC or FPGA...
We demonstrate how Field Programmable Gate Arrays (FPGAs) may be used to address the computing challenges associated with assembling genome sequences from recent ultra-high-through...
Kristian Stevens, Henry Chen, Terry Filiba, Peter ...
Recent developments in information technologies made the secure transmission of digital data a critical design point. Large data flows have to be exchanged securely and involve en...