174 search results - page 6 / 35 » High Performance FPGA Implementation of the Mersenne Twister |
FCCM
2009
IEEE
13 years 11 months ago
2009
IEEE
This paper proposes a high performance least square solver on FPGAs using the Cholesky decomposition method. Our design can be realized by iteratively adopting a single triangular...
FPL
2008
Springer
13 years 9 months ago
2008
Springer
Abstract-The network on chip will become a future general purpose interconnect for FPGAs much like today's standard OPB or PLB bus architectures. However, performance characte...
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
Implementing real-time video processing systems put high requirements on computation and memory performance. FPGAs have proven to be effective implementation architecture for thes...
FPL
2003
Springer
14 years 20 days ago
2003
Springer
In this paper we present a single-chip FPGA full encryptor/decryptor core design of the AES algorithm. Our design performs all of them, encryption, decryption and key scheduling pr...
FPL
1995
Springer
13 years 11 months ago
1995
Springer
General purpose custom computing platforms, such as Splash-2, have demonstrated the ability to enter mainstream computing not only due to their near application-specific speeds bu...