624 search results - page 54 / 125 » High Performance Matrix Multiplication on Many Cores |
BMCBI
2010
13 years 9 months ago
2010
Background: Solving bioinformatics tasks often requires extensive computational power. Recent trends in processor architecture combine multiple cores into a single chip to improve...
CVPR
2009
IEEE
15 years 4 months ago
2009
IEEE
Graph-based methods form a main category of semisupervised
learning, offering flexibility and easy implementation
in many applications. However, the performance of
these methods...
LCN
2005
IEEE
14 years 2 months ago
2005
IEEE
— The problem of achieving fairness in the allocation of the bandwidth resource on a link shared by multiple flows of traffic has been extensively researched over the last deca...
EMSOFT
2005
Springer
14 years 2 months ago
2005
Springer
Recent research in embedded computing indicates that packing multiple processor cores on the same die is an effective way of utilizing the ever-increasing number of transistors. T...
VLSID
2010
IEEE
14 years 29 days ago
2010
IEEE
Network-on-Chip combined with Globally Asynchronous Locally Synchronous paradigm is a promising architecture for easy IP integration and utilization with multiple voltage levels. ...