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» High level synthesis for reconfigurable datapath structures
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TODAES
2008
158views more  TODAES 2008»
13 years 7 months ago
Designing secure systems on reconfigurable hardware
The extremely high cost of custom ASIC fabrication makes FPGAs an attractive alternative for deployment of custom hardware. Embedded systems based on reconfigurable hardware integ...
Ted Huffmire, Brett Brotherton, Nick Callegari, Jo...
ECRTS
2008
IEEE
13 years 9 months ago
Dynamic Reconfiguration for Adaptive Multiversion Real-Time Systems
Modern real-time systems must be designed to be highly adaptable, reacting to aperiodic events in a predictable manner and exhibiting graceful degradation in overload scenarios wh...
George Lima, Eduardo Camponogara, Ana Carolina Sok...
EDCC
2006
Springer
13 years 11 months ago
SEU Mitigation Techniques for Microprocessor Control Logic
The importance of fault tolerance at the processor architecture level has been made increasingly important due to rapid advancements in the design and usage of high performance de...
T. S. Ganesh, Viswanathan Subramanian, Arun K. Som...
CCL
1994
Springer
14 years 1 days ago
Application of Constraint Logic Programming for VLSI CAD Tools
Abstract: This paper describes the application of CLP (constraint logic programming) to several digital circuit design problems. It is shown that logic programming together with ef...
Renate Beckmann, Ulrich Bieker, Ingolf Markhof
GECCO
2008
Springer
179views Optimization» more  GECCO 2008»
13 years 9 months ago
Developing neural structure of two agents that play checkers using cartesian genetic programming
A developmental model of neural network is presented and evaluated in the game of Checkers. The network is developed using cartesian genetic programs (CGP) as genotypes. Two agent...
Gul Muhammad Khan, Julian Francis Miller, David M....