216 search results - page 40 / 44 » High performance encryption cores for 3G networks |
PPL
2008
13 years 7 months ago
2008
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
ACMMSP
2006
ACM
14 years 1 months ago
2006
ACM
This paper proposes and studies a distributed L2 cache management approach through page-level data to cache slice mapping in a future processor chip comprising many cores. L2 cach...
TRIDENTCOM
2005
IEEE
14 years 27 days ago
2005
IEEE
Core to ubiquitous computing environments are adaptive software systems that adapt their behavior to the context in which the user is attempting the task the system aims to suppor...
ICS
2005
Tsinghua U.
14 years 25 days ago
2005
Tsinghua U.
As network traffic continues to increase and with the requirement to process packets at line rates, high performance routers need to forward millions of packets every second. Eve...
VLSID
2010
IEEE
13 years 11 months ago
2010
IEEE
Network-on-Chip combined with Globally Asynchronous Locally Synchronous paradigm is a promising architecture for easy IP integration and utilization with multiple voltage levels. ...