733 search results - page 3 / 147 » High performance in tree-based parallel architectures |
IPPS
2000
IEEE
13 years 12 months ago
2000
IEEE
The newly introduced Microprocessor Architecture for Java Computing MAJC supports parallelism in a hierarchy of levels: multiprocessors on chip,vertical micro threading, instruct...
HCW
2000
IEEE
13 years 12 months ago
2000
IEEE
In this work we present the results of a project aimed at assembling an hybrid massively parallel machine, the PQE1 prototype, devoted to the simulation of complex physical models...
HPDC
2000
IEEE
13 years 12 months ago
2000
IEEE
We describe a software architecture for storage services in computational grid environments. Based upon a lightweight message-passing paradigm, the architecture enables the provis...
ARITH
2007
IEEE
14 years 1 months ago
2007
IEEE
This paper introduces two novel architectures for parallel decimal multipliers. Our multipliers are based on a new algorithm for decimal carry–save multioperand addition that us...
SBACPAD
2008
IEEE
14 years 1 months ago
2008
IEEE
Single processor technology has been evolving across last decades, but due to physical limitations of chip manufacturing process, the industry is pursuing alternatives to sustain ...