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TVLSI
2008
140views more  TVLSI 2008»
13 years 7 months ago
A Novel Mutation-Based Validation Paradigm for High-Level Hardware Descriptions
We present a Mutation-based Validation Paradigm (MVP) technology that can handle complete high-level microprocessor implementations and is based on explicit design error modeling, ...
Jorge Campos, Hussain Al-Asaad
DATE
2002
IEEE
105views Hardware» more  DATE 2002»
14 years 25 days ago
Power-Manageable Scheduling Technique for Control Dominated High-Level Synthesis
Optimizing power consumption at high-level is a critical step towards power-efficient digital system designs. This paper addresses the power management problem by scheduling a giv...
Chunhong Chen, Majid Sarrafzadeh
WSC
1997
13 years 9 months ago
The Department of Defense High Level Architecture
The High Level Architecture (HLA) provides the specification of a common technical architecture for use across all classes of simulations in the US Department of Defense. It provi...
Judith S. Dahmann, Richard Fujimoto, Richard M. We...
ITNG
2006
IEEE
14 years 1 months ago
Adding High Level VoIP Facilities to the Unicon Language
Many programming languages have built-in functions for socket programming and data communications. These days, the Internet is widely used for voice communications that employ a V...
Ziad Al-Sharif, Clinton Jeffery
ASPDAC
2007
ACM
135views Hardware» more  ASPDAC 2007»
13 years 12 months ago
A Parameterized Architecture Model in High Level Synthesis for Image Processing Applications
- Most image processing applications are computationally intensive and data intensive. Reconfigurable hardware boards provide a convenient and flexible solution to speed up these a...
Yazhuo Dong, Yong Dou