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FPL
2003
Springer
80views Hardware» more  FPL 2003»
14 years 4 months ago
High-Level Design Tools for FPGA-Based Combinatorial Accelerators
Analysis of different combinatorial search algorithms has shown that they have a set of distinctive features in common. The paper suggests a number of reusable blocks that support ...
Valery Sklyarov, Iouliia Skliarova, Pedro Almeida,...
DELTA
2010
IEEE
14 years 4 months ago
Algorithm Transformation for FPGA Implementation
— High level hardware description languages aim to make hardware design more like programming software. These languages are often used to accelerate legacy software algorithms by ...
Donald G. Bailey, Christopher T. Johnston
DSD
2010
IEEE
221views Hardware» more  DSD 2010»
13 years 8 months ago
Modeling Reconfigurable Systems-on-Chips with UML MARTE Profile: An Exploratory Analysis
Reconfigurable FPGA based Systems-on-Chip (SoC) architectures are increasingly becoming the preferred solution for implementing modern embedded systems, due to their flexible natur...
Sana Cherif, Imran Rafiq Quadri, Samy Meftali, Jea...
SEKE
2005
Springer
14 years 4 months ago
Application of Design Combinatorial Theory to Scenario-Based Software Architecture Analysis
Design combinatorial theory for test-case generation has been used successfully in the past. It is useful in optimizing test cases as it is practically impossible to exhaustively t...
Chung-Horng Lung, Marzia Zaman
FCCM
2009
IEEE
169views VLSI» more  FCCM 2009»
14 years 5 months ago
RC-BLASTn: Implementation and Evaluation of the BLASTn Scan Function
BLASTn is a tool universally used by biologists to identify similarities between nucleotide based biological genome sequences. This report describes an FPGA based hardware impleme...
Siddhartha Datta, Parag Beeraka, Ron Sass