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GECCO
2009
Springer
241views Optimization» more  GECCO 2009»
14 years 24 days ago
A fast high quality pseudo random number generator for nVidia CUDA
Previously either due to hardware GPU limits or older versions of software, careful implementation of PRNGs was required to make good use of the limited numerical precision availa...
William B. Langdon
WETICE
1999
IEEE
14 years 13 days ago
Static Analysis of Binary Code to Isolate Malicious Behaviors
In this paper, we address the problem of static slicing on binary executables for the purposes of the malicious code detection in COTS components. By operating directly on binary ...
J. Bergeron, Mourad Debbabi, M. M. Erhioui, B&eacu...
SCCC
1998
IEEE
14 years 12 days ago
Resurrecting Ada's Rendez-Vous in Java
Java is a programming language designed with concurrency in mind from its inception. However, the synchronization mechanism provided is a restricted version of Hoare's Monito...
Luis Mateu, José M. Piquer, Juan Leó...
ISSS
1997
IEEE
109views Hardware» more  ISSS 1997»
14 years 11 days ago
Reducing the Complexity of ILP Formulations for Synthesis
Integer Linear Programming ILP is commonly used in high level and system level synthesis. It is an NP-Complete problem in general cases. There exists some tools that give an o...
Anne Mignotte, Olivier Peyran
ICCAD
1994
IEEE
104views Hardware» more  ICCAD 1994»
14 years 9 days ago
Module selection and data format conversion for cost-optimal DSP synthesis
In high level synthesis each node of a synchronous dataflow graph (DFG) is scheduled to a specific time and allocated to a processor. In this paper we present new integer linear p...
Kazuhito Ito, Lori E. Lucke, Keshab K. Parhi