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ISCAS
2007
IEEE
138views Hardware» more  ISCAS 2007»
14 years 1 months ago
A High-Speed Delta-Sigma Modulator with Relaxed DEM Timing Requirement
Abstract—This paper presents a high-speed digital feedforward Delta-Sigma Modulator which relaxes timing requirement for the Dynamic Element Matching (DEM) algorithm. By making t...
Sunwoo Kwon, Un-Ku Moon
ISCAS
2005
IEEE
184views Hardware» more  ISCAS 2005»
14 years 1 months ago
An adaptive, truly background calibration method for high speed pipeline ADC design
: This paper presents a self-calibration method for designing high speed pipeline ADCs. Unlike all existing calibration algorithms, the proposed calibration does not insert any tes...
Degang Chen, Zhongjun Yu, Randall L. Geiger
VRST
2005
ACM
14 years 1 months ago
Real time tracking of high speed movements in the context of a table tennis application
In this paper we summarize the experiences we made with the implementation of a table tennis application. After describing the hardware necessities of our system we give insight i...
Stephan Rusdorf, Guido Brunnett
CSREAESA
2006
13 years 9 months ago
An Efficient Design of High Speed Network Security Platform using Network Processor
: The explosive growth of internet traffic and the increasing complexity of the functions performed by network nodes have given rise to a new breed of programmable micro-processors...
Yong-Sung Jeon, Sang-Woo Lee, Ki-Young Kim
VLSID
2002
IEEE
106views VLSI» more  VLSID 2002»
14 years 8 months ago
SWASAD: An ASIC Design for High Speed DNA Sequence Matching
This paper presents the Smith and Waterman Algorithm-Specific ASIC Design (SWASAD) project. This is a hardware solution that implements the S&W algorithm.. The SWASAD is an imp...
Tony Han, Sri Parameswaran