290 search results - page 36 / 58 » High-Speed MARS Hardware |
ISCAS
2006
IEEE
14 years 1 months ago
2006
IEEE
— We describe and analyze a novel CMOS pixel for high speed, low light imaging applications. The new pixel achieves lower dark current and noise and increased gain in comparison ...
ISCAS
2005
IEEE
14 years 1 months ago
2005
IEEE
— This paper presents the design of a combined two’s complement and IEEE 754-compliant floating-point comparator. Unlike previous designs, this comparator incorporates both op...
ISCAS
2005
IEEE
14 years 1 months ago
2005
IEEE
—This paper presents a 2GHz 8-bit CMOS ROM-less direct digital frequency synthesizer (DDFS). Nonlinear current steering digital to analog converter (DAC) has been utilized to con...
ASPDAC
2005
ACM
14 years 1 months ago
2005
ACM
- Domino logic is used extensively in high speed microprocessor datapath design. Although domino gates have small propagation delay, they consume relatively more power. We propose ...
GLVLSI
2003
IEEE
14 years 24 days ago
2003
IEEE
Clock-delayed (CD) domino is a dynamic logic family developed to provide both inverting and non-inverting logic on single-rail gates. It is self-timed and can be easily pipelined ...