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» High-level power estimation
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CASES
2007
ACM
13 years 11 months ago
INTACTE: an interconnect area, delay, and energy estimation tool for microarchitectural explorations
Prior work on modeling interconnects has focused on optimizing the wire and repeater design for trading off energy and delay, and is largely based on low level circuit parameters....
Rahul Nagpal, Arvind Madan, Bharadwaj Amrutur, Y. ...
TASLP
2008
100views more  TASLP 2008»
13 years 7 months ago
Noise Tracking Using DFT Domain Subspace Decompositions
All discrete Fourier transform (DFT) domain-based speech enhancement gain functions rely on knowledge of the noise power spectral density (PSD). Since the noise PSD is unknown in a...
Richard C. Hendriks, Jesper Jensen, Richard Heusde...
FDL
2003
IEEE
14 years 1 months ago
Design and Power Analysis in SysteC of an I2C Bus Driver
The paper presents a methodology to integrate information on power consumption in a high level functional description of a System-on-chip. The power dissipated during the executio...
Marco Caldari, Massimo Conti, Paolo Crippa, Simone...
ICCAD
2000
IEEE
100views Hardware» more  ICCAD 2000»
14 years 3 days ago
Automated Data Dependency Size Estimation with a Partially Fixed Execution Ordering
For data dominated applications, the system level design trajectory should first focus on finding a good data transfer and storage solution. Since no realization details are avail...
Per Gunnar Kjeldsberg, Francky Catthoor, Einar J. ...
VLSID
2005
IEEE
285views VLSI» more  VLSID 2005»
14 years 8 months ago
Power Monitors: A Framework for System-Level Power Estimation Using Heterogeneous Power Models
Abstract--Power analysis early in the design cycle is critical for the design of lowpower systems. With the move to system-level specifications and design methodologies, there has ...
Nikhil Bansal, Kanishka Lahiri, Anand Raghunathan,...