1773 search results - page 44 / 355 » High-level power estimation |
TVLSI
2010
13 years 4 months ago
2010
In this paper, we present a low-power architectural synthesis system (LOPASS) for field-programmable gate-array (FPGA) designs with interconnect power estimation and optimization. ...
CISS
2010
IEEE
13 years 1 months ago
2010
IEEE
Abstract-Malicious attacks against power system state estimation are considered. It has been recently observed that if an adversary is able to manipulate the measurements taken at ...
ICCAD
1994
IEEE
14 years 2 months ago
1994
IEEE
Abstract - Today's digital design systems are running out of steam, when it comes to meeting the challenges presented by simultaneous switching, power consumption and reliabil...
ICCAD
2006
IEEE
14 years 7 months ago
2006
IEEE
As CMOS technology scales into the nanometer regime, power dissipation and associated thermal concerns in high-performance ICs due to on-chip hot-spots and thermal gradients are b...
ICC
2008
IEEE
14 years 4 months ago
2008
IEEE
—This paper addresses the joint estimator and power optimization problem for a sensor network whose mission is to estimate an unknown parameter. We assume a two-hop network where...