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VLSID
2000
IEEE
94views VLSI» more  VLSID 2000»
14 years 1 days ago
A Genetic Algorithm for the Synthesis of Structured Data Paths
The technique presented here achieves simultaneous optimization of schedule time and data path component cost within a structured data path architecture, using a genetic algorithm...
Chittaranjan A. Mandal, R. M. Zimmer
VLSID
2003
IEEE
92views VLSI» more  VLSID 2003»
14 years 8 months ago
Energy Efficient Scheduling for Datapath Synthesis
In this paper, we describe two new algorithms for datapath scheduling which aim at energy reduction while maintaining performance. The proposed algorithms, time constrained and re...
Saraju P. Mohanty, N. Ranganathan
EUROMICRO
1998
IEEE
13 years 12 months ago
Process Scheduling for Performance Estimation and Synthesis of Hardware/Software Systems
The paper presents an approach to process scheduling for embedded systems. Target architectures consist of several processors and ASICs connected by shared busses. We have develop...
Petru Eles, Krzysztof Kuchcinski, Zebo Peng, Alexa...
ASPDAC
1995
ACM
103views Hardware» more  ASPDAC 1995»
13 years 11 months ago
A scheduling algorithm for multiport memory minimization in datapath synthesis
- In this paper, we present a new scheduling algorithms that generates area-efficient register transfer level datapaths with multiport memories. The proposed scheduling algorithm a...
Hae-Dong Lee, Sun-Young Hwang
AUSAI
2005
Springer
14 years 1 months ago
A Genetic Algorithm for Job Shop Scheduling with Load Balancing
This paper deals with the load-balancing of machines in a real-world job-shop scheduling problem, with identical machines. The load-balancing algorithm allocates jobs, split into l...
Sanja Petrovic, Carole Fayad