The ability to compute the parasitic inductance of the interconnect is critical to the timing verification of modern VLSI circuits. A challenging aspect of inductance extraction i...
With the acceleration of technological development we are reaching the point where our systems and their user interfaces become to some degree outdated 'legacy systems' ...
Les Nelson, Elizabeth F. Churchill, Laurent Denoue...
—In this paper, we present an approach to nonlinear model reduction based on representing a nonlinear system with a piecewise-linear system and then reducing each of the pieces w...
Through the algorthmic design patterns of data parallelism and task parallelism, the graphics processing unit (GPU) offers the potential to vastly accelerate discovery and innovat...
Jeremy S. Archuleta, Yong Cao, Thomas Scogland, Wu...
The advances in multicore technology and modern interconnects is rapidly accelerating the number of cores deployed in today’s commodity clusters. A majority of parallel applicat...
Amith R. Mamidala, Rahul Kumar, Debraj De, Dhabale...