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DATE
2006
IEEE
114views Hardware» more  DATE 2006»
13 years 11 months ago
Compositional, efficient caches for a chip multi-processor
In current multi-media systems major parts of the functionality consist of software tasks executed on a set of concurrently operating processors. Those tasks interfere with each o...
Anca Mariana Molnos, Marc J. M. Heijligers, Sorin ...
ISCA
2010
IEEE
305views Hardware» more  ISCA 2010»
14 years 22 days ago
Rethinking DRAM design and organization for energy-constrained multi-cores
DRAM vendors have traditionally optimized the cost-perbit metric, often making design decisions that incur energy penalties. A prime example is the overfetch feature in DRAM, wher...
Aniruddha N. Udipi, Naveen Muralimanohar, Niladris...
RTSS
2009
IEEE
14 years 2 months ago
Sloth: Threads as Interrupts
—Traditional operating systems differentiate between threads, which are managed by the kernel scheduler, and interrupt handlers, which are scheduled by the hardware. This approac...
Wanja Hofer, Daniel Lohmann, Fabian Scheler, Wolfg...
ATAL
2007
Springer
14 years 1 months ago
Regret based dynamics: convergence in weakly acyclic games
Regret based algorithms have been proposed to control a wide variety of multi-agent systems. The appeal of regretbased algorithms is that (1) these algorithms are easily implement...
Jason R. Marden, Gürdal Arslan, Jeff S. Shamm...
SIGOPSE
1992
ACM
13 years 11 months ago
Names should mean what, not where
Abstract-- This paper describes the design and implementation1 of IRIS: an intentional resource indicator service. IRIS springs from the concept that end-users should not be bogged...
James O'Toole, David K. Gifford