537 search results - page 8 / 108 » High-precision interconnect analysis |
DATE
2010
IEEE
14 years 14 days ago
2010
IEEE
—Recent developments have shown the possibility of leveraging silicon nanophotonic technologies for chip-scale interconnection fabrics that deliver high bandwidth and power effi...
DATE
2005
IEEE
13 years 9 months ago
2005
IEEE
This paper reports a novel simulation methodology for analysis and prediction of substrate noise impact on analog / RF circuits taking into account the role of the parasitic resis...
PE
2006
Springer
13 years 7 months ago
2006
Springer
In a multi-level cache such as those used for web caching, a hit at level l leads to the caching of the requested object in all intermediate caches on the reverse path (levels l -...
ISQED
2005
IEEE
14 years 29 days ago
2005
IEEE
This paper presents a two-step, RC-interconnect insensitive linear time-varying (LTV) driver model for gate-level timing calculation. We show how to characterize a driver with the...
DAC
2000
ACM
14 years 8 months ago
2000
ACM
We revisit a basic element of modern signal integrity analysis, the modeling of worst-case coupling capacitance effects within a switch factor (SF) based methodology. We show that...