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ICPR
2004
IEEE
16 years 5 months ago
From Massively Parallel Image Processors to Fault-Tolerant Nanocomputers
Parallel processors such as SIMD computers have been successfully used in various areas of high performance image and data processing. Due to their characteristics of highly regula...
Jie Han, Pieter Jonker
ICCAD
2003
IEEE
127views Hardware» more  ICCAD 2003»
16 years 1 months ago
Layout-Aware Scan Chain Synthesis for Improved Path Delay Fault Coverage
Path delay fault testing becomes increasingly important due to higher clock rates and higher process variability caused by shrinking geometries. Achieving high-coverage path delay...
Puneet Gupta, Andrew B. Kahng, Ion I. Mandoiu, Pun...
ICC
2009
IEEE
129views Communications» more  ICC 2009»
15 years 11 months ago
Random Access Protocols for WLANs Based on Mechanism Design
— In wireless local area networks (WLANs), quality of service (QoS) can be provided by mapping applications with different requirements (e.g., delay and throughput) into one of t...
Man Hon Cheung, Amir Hamed Mohsenian Rad, Vincent ...
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WCNC
2008
IEEE
15 years 11 months ago
A Low Latency Scheme for Bulk RFID Tag Reading
—Passive RFID tags transmit their ID information to a tag reader upon energization by the reader. These transmitted signals, or IDs, may collide if multiple tags transmit their I...
Erik F. Golen, Nirmala Shenoy, Xiaojun Cao
INFOCOM
2007
IEEE
15 years 10 months ago
Bandwidth Balancing in Multi-Channel IEEE 802.16 Wireless Mesh Networks
Abstract— In wireless mesh networks, the end-to-end throughput of traffic flows depends on the path length, i.e. the higher the number of hops, the lower becomes the throughput...
Claudio Cicconetti, Ian F. Akyildiz, Luciano Lenzi...