Sciweavers

941 search results - page 175 / 189
» History-Dependent Petri Nets
Sort
View
DATE
2000
IEEE
88views Hardware» more  DATE 2000»
14 years 1 days ago
Techniques for Reducing Read Latency of Core Bus Wrappers
Today’s system-on-a-chip designs consist of many cores. To enable cores to be easily integrated into different systems, many propose creating cores with their internal logic sep...
Roman L. Lysecky, Frank Vahid, Tony Givargis
VRML
2000
ACM
13 years 12 months ago
3D behavioral model design for simulation and software engineering
Modeling is used to build structures that serve as surrogates for other objects. As children, we learn to model at a very young age. An object such as a small toy train teaches us...
Paul A. Fishwick
AGENTS
2000
Springer
13 years 12 months ago
A knowledge-based approach for designing intelligent team training systems
This paper presents a knowledge approach to designing team training systems using intelligent agents. We envision a computer-based training system in which teams are trained by pu...
Jianwen Yin, Michael S. Miller, Thomas R. Ioerger,...
DSRT
1999
IEEE
13 years 12 months ago
Simulation of Multimedia Systems Based on Actors and QoSsynchronizers
This paper describes a variant of the actor model suited to the development of multimedia systems. The actor model centers on non-overkilling concurrency and customizable constrai...
Giancarlo Fortino, Libero Nigro
ICCAD
1999
IEEE
80views Hardware» more  ICCAD 1999»
13 years 12 months ago
What is the cost of delay insensitivity?
Deep submicron technology calls for new design techniques, in which wire and gate delays are accounted to have equal or nearly equal effect on circuit behaviour. Asynchronous spee...
Hiroshi Saito, Alex Kondratyev, Jordi Cortadella, ...