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ICECCS
2010
IEEE
196views Hardware» more  ICECCS 2010»
13 years 7 months ago
Implementing and Evaluating a Model Checker for Transactional Memory Systems
Abstract—Transactional Memory (TM) is a promising technique that addresses the difficulty of parallel programming. Since TM takes responsibility for all concurrency control, TM ...
Woongki Baek, Nathan Grasso Bronson, Christos Kozy...
ISCAS
2008
IEEE
141views Hardware» more  ISCAS 2008»
14 years 2 months ago
AMBA AHB bus potocol checker with efficient debugging mechanism
—Bus-based system-on-chip (SoC) design becomes the major integration methods for shorting design cycle and time-tomarket, thus how to verify IP functionality on bus protocol is a...
Yi-Ting Lin, Chien-Chou Wang, Ing-Jer Huang
ASPLOS
2010
ACM
14 years 2 months ago
Dynamic filtering: multi-purpose architecture support for language runtime systems
This paper introduces a new abstraction to accelerate the readbarriers and write-barriers used by language runtime systems. We exploit the fact that, dynamically, many barrier exe...
Tim Harris, Sasa Tomic, Adrián Cristal, Osm...
DSD
2006
IEEE
174views Hardware» more  DSD 2006»
13 years 11 months ago
Energy-Efficient Cache Coherence for Embedded Multi-Processor Systems through Application-Driven Snoop Filtering
Title of thesis: Energy-Efficient Cache Coherence for Embedded Multi-Processor Systems through Application-Driven Snoop Filtering Alokika Dash, Master of Science, 2006 Thesis dire...
Alokika Dash, Peter Petrov
ASPDAC
1998
ACM
72views Hardware» more  ASPDAC 1998»
13 years 11 months ago
Space- and Time-Efficient BDD Construction via Working Set Control
Binary decision diagrams (BDDs) have been shown to be a powerful tool in formal verification. Efficient BDD construction techniques become more important as the complexity of proto...
Bwolen Yang, Yirng-An Chen, Randal E. Bryant, Davi...