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MICRO
2002
IEEE
131views Hardware» more  MICRO 2002»
14 years 10 days ago
Pointer cache assisted prefetching
Data prefetching effectively reduces the negative effects of long load latencies on the performance of modern processors. Hardware prefetchers employ hardware structures to predic...
Jamison D. Collins, Suleyman Sair, Brad Calder, De...
ISPD
2004
ACM
146views Hardware» more  ISPD 2004»
14 years 26 days ago
Power-aware clock tree planning
Modern processors and SoCs require the adoption of poweroriented design styles, due to the implications that power consumption may have on reliability, cost and manufacturability ...
Monica Donno, Enrico Macii, Luca Mazzoni
TPDS
2008
175views more  TPDS 2008»
13 years 7 months ago
Centralized versus Distributed Schedulers for Bag-of-Tasks Applications
Multiple applications that execute concurrently on heterogeneous platforms compete for CPU and network resources. In this paper, we consider the problem of scheduling applications ...
Olivier Beaumont, Larry Carter, Jeanne Ferrante, A...
CAMP
2005
IEEE
14 years 1 months ago
Speeding-up NCC-Based Template Matching Using Parallel Multimedia Instructions
— This paper describes the mapping of a recently introduced template matching algorithm based on the Normalized Cross Correlation (NCC) on a general purpose processor endowed wit...
Luigi di Stefano, Stefano Mattoccia, Federico Tomb...
PLDI
2003
ACM
14 years 20 days ago
A compiler framework for speculative analysis and optimizations
Speculative execution, such as control speculation and data speculation, is an effective way to improve program performance. Using edge/path profile information or simple heuristi...
Jin Lin, Tong Chen, Wei-Chung Hsu, Pen-Chung Yew, ...