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DATE
2004
IEEE
119views Hardware» more  DATE 2004»
14 years 1 months ago
Configuration-Sensitive Process Scheduling for FPGA-Based Computing Platforms
Reconfigurable computing has become an important part of research in software systems and computer architecture. While prior research on reconfigurable computing have addressed ar...
Guilin Chen, Mahmut T. Kandemir, Ugur Sezer
ISQED
2005
IEEE
98views Hardware» more  ISQED 2005»
14 years 3 months ago
Wire Planning with Bounded Over-the-Block Wires
Hierarchical approach greatly facilitates large-scale chip design by hiding distracting details in low-level objects. However, the lowlevel designs have to have a global view of h...
Hua Xiang, I-Min Liu, Martin D. F. Wong
FCCM
2005
IEEE
84views VLSI» more  FCCM 2005»
14 years 3 months ago
Prototyping Architectural Support for Program Rollback Using FPGAs
This paper presents a processor and memory-hierarchy prototype based on FPGAs that provides hardware support for program rollback. We use this prototype to demonstrate how compile...
Radu Teodorescu, Josep Torrellas
SLS
2009
Springer
224views Algorithms» more  SLS 2009»
14 years 4 months ago
High-Performance Local Search for Solving Real-Life Inventory Routing Problems
Abstract. In this paper, a real-life routing and scheduling problem encountered is addressed. The problem, which consists in optimizing the delivery of fluids by tank trucks on a ...
Thierry Benoist, Bertrand Estellon, Fréd&ea...
PODC
2003
ACM
14 years 3 months ago
Scaling properties of the Internet graph
As the Internet grows in size, it becomes crucial to understand how the speeds of links in the network must improve in order to sustain the pressure of new end-nodes being added e...
Aditya Akella, Shuchi Chawla, Arvind Kannan, Srini...