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» Hybrid simulation for embedded software energy estimation
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IEEECIT
2010
IEEE
13 years 7 months ago
Introducing Hardware-in-Loop Concept to the Hardware/Software Co-design of Real-time Embedded Systems
—As the need for embedded systems to interact with other systems is growing fast, we see great opportunities in introducing the hardware-in-the-loop technique to the field of ha...
Dogan Fennibay, Arda Yurdakul, Alper Sen
CASES
2004
ACM
14 years 2 months ago
A low power architecture for embedded perception
Recognizing speech, gestures, and visual features are important interface capabilities for future embedded mobile systems. Unfortunately, the real-time performance requirements of...
Binu K. Mathew, Al Davis, Michael Parker
CASES
2007
ACM
14 years 18 days ago
INTACTE: an interconnect area, delay, and energy estimation tool for microarchitectural explorations
Prior work on modeling interconnects has focused on optimizing the wire and repeater design for trading off energy and delay, and is largely based on low level circuit parameters....
Rahul Nagpal, Arvind Madan, Bharadwaj Amrutur, Y. ...
CODES
2009
IEEE
14 years 1 months ago
Native MPSoC co-simulation environment for software performance estimation
Performance estimation of Multi-Processor System-On-Chip (MPa high abstraction level is required in order to perform early architecture exploration and accurate design validations...
Patrice Gerin, Mian Muhammad Hamayun, Fréd&...
MICRO
2000
IEEE
122views Hardware» more  MICRO 2000»
14 years 1 months ago
Dynamic zero compression for cache energy reduction
Dynamic Zero Compression reduces the energy required for cache accesses by only writing and reading a single bit for every zero-valued byte. This energy-conscious compression is i...
Luis Villa, Michael Zhang, Krste Asanovic