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DATE
2009
IEEE
132views Hardware» more  DATE 2009»
14 years 2 months ago
Power and performance of read-write aware Hybrid Caches with non-volatile memories
—Caches made of non-volatile memory technologies, such as Magnetic RAM (MRAM) and Phase-change RAM (PRAM), offer dramatically different power-performance characteristics when com...
Xiaoxia Wu, Jian Li, Lixin Zhang, Evan Speight, Yu...
GLVLSI
2003
IEEE
144views VLSI» more  GLVLSI 2003»
14 years 27 days ago
A hybrid adiabatic content addressable memory for ultra low-power applications
This paper presents a hybrid adiabatic content addressable memory (CAM). The CAM uses an adiabatic switching technique to reduce the energy consumption in the match line while kee...
Aiyappan Natarajan, David Jasinski, Wayne Burleson...
ISCA
2010
IEEE
222views Hardware» more  ISCA 2010»
13 years 9 months ago
Cohesion: a hybrid memory model for accelerators
Two broad classes of memory models are available today: models with hardware cache coherence, used in conventional chip multiprocessors, and models that rely upon software to mana...
John H. Kelm, Daniel R. Johnson, William Tuohy, St...
FLAIRS
2003
13 years 9 months ago
Hybrid Deletion Policies for Case Base Maintenance
Case memory maintenance in a Case-Based Reasoning system is important for two main reasons: (1) to control the case memory size; (2) to reduce irrelevant and redundant instances t...
Maria Salamó, Elisabet Golobardes
ISLPED
2003
ACM
111views Hardware» more  ISLPED 2003»
14 years 26 days ago
Energy-aware memory allocation in heterogeneous non-volatile memory systems
Memory systems consume a significant portion of power in handheld embedded systems. So far, low-power memory techniques have addressed the power consumption when the system is tu...
Hyung Gyu Lee, Naehyuck Chang