713 search results - page 86 / 143 » Hybrid transactional memory |
VMV
2001
13 years 10 months ago
2001
Efficient isosurface extraction from large volume data sets requires special algorithms and data structures. Such algorithms typically either use a hierarchical spatial subdivisio...
ASPLOS
2000
ACM
14 years 1 months ago
2000
ACM
This paper describes the architecture and implementation of the AlphaServer GS320, a cache-coherent non-uniform memory access multiprocessor developed at Compaq. The AlphaServer G...
DAC
2008
ACM
14 years 9 months ago
2008
ACM
We present a cross-layer customization methodology for latency and bandwidth efficient inter-core communication in embedded multiprocessors. The methodology integrates compiler, o...
HPCA
2001
IEEE
14 years 9 months ago
2001
IEEE
The use of the Java programming language for implementing server-side application logic is increasing in popularity, yet there is very little known about the architectural require...
COLCOM
2007
IEEE
14 years 3 months ago
2007
IEEE
—In many applications, transaction data arrive in the form of high speed data streams. These data contain a lot of information about customers that needs to be carefully managed ...