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» Hybridizing a Logical Framework
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DAC
2006
ACM
14 years 11 months ago
A new LP based incremental timing driven placement for high performance designs
In this paper, we propose a new linear programming based timing driven placement framework for high performance designs. Our LP framework is mainly net-based, but it takes advanta...
Tao Luo, David Newmark, David Z. Pan
ICLP
2007
Springer
14 years 4 months ago
HD-rules: A Hybrid System Interfacing Prolog with DL-reasoners
The paper presents a prototype system HD-Rules (Hybrid integration of Description Logic and Rules) that integrates normal clauses under the wellfounded semantics with ontologies sp...
Wlodzimierz Drabent, Jakob Henriksson, Jan Maluszy...
DATE
2010
IEEE
183views Hardware» more  DATE 2010»
14 years 3 months ago
Monolithically stackable hybrid FPGA
— The paper introduces novel field programmable gate array (FPGA) circuits based on hybrid CMOS/resistive switching device (memristor) technology and explores several logic archi...
Dmitri Strukov, Alan Mishchenko
AMR
2005
Springer
80views Multimedia» more  AMR 2005»
14 years 3 months ago
Developing AMIE: An Adaptive Multimedia Integrated Environment
Large multimedia repositories can be used more effectively by providing a hybrid environment for accomplishing common tasks, such as searching, browsing, presenting and indexing o...
Osama El Demerdash, Sabine Bergler, Leila Kosseim,...
FPGA
1999
ACM
130views FPGA» more  FPGA 1999»
14 years 2 months ago
Hybrid Product Term and LUT Based Architectures Using Embedded Memory Blocks
The Embedded System Block (ESB) of the APEX20K programmable logic device family from Altera Corporation includes the capability of implementing product term macrocells in addition...
Frank Heile, Andrew Leaver