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WMPI
2004
ACM
14 years 28 days ago
Compiler-optimized usage of partitioned memories
In order to meet the requirements concerning both performance and energy consumption in embedded systems, new memory architectures are being introduced. Beside the well-known use o...
Lars Wehmeyer, Urs Helmig, Peter Marwedel
ECRTS
2004
IEEE
13 years 11 months ago
Optimized Slowdown in Real-Time Task Systems
In [1], Jejurikar and Gupta investigated energy savings due to optimal slowdown of periodic tasks in real-time task systems, where tasks have varying power characteristics and task...
Ravindra Jejurikar, Rajesh K. Gupta
PPOPP
2005
ACM
14 years 1 months ago
Exposing disk layout to compiler for reducing energy consumption of parallel disk based systems
Disk subsystem is known to be a major contributor to overall power consumption of high-end parallel systems. Past research proposed several architectural level techniques to reduc...
Seung Woo Son, Guangyu Chen, Mahmut T. Kandemir, A...
DATE
2010
IEEE
158views Hardware» more  DATE 2010»
14 years 18 days ago
Energy- and endurance-aware design of phase change memory caches
—Phase change memory (PCM) is one of the most promising technology among emerging non-volatile random access memory technologies. Implementing a cache memory using PCM provides m...
Yongsoo Joo, Dimin Niu, Xiangyu Dong, Guangyu Sun,...
ICWN
2003
13 years 8 months ago
Energy-Efficient Bootstrapping Protocol for Sensor Networks
Sensor networks are poised for increasingly wider uses in many military and civil applications. We present a bootstrapping protocol for a class of sensor networks in which the net...
Rajesh Mathew, Mohamed F. Younis