492 search results - page 46 / 99 » Impact of Limited Memory Resources |
APCSAC
2003
IEEE
14 years 1 months ago
2003
IEEE
Very Long Instruction Word (VLIW) architectures exploit instruction level parallelism (ILP) with the help of the compiler to achieve higher instruction throughput with minimal hard...
CGF
2010
13 years 10 months ago
2010
We propose a new framework design for exploiting multi-core architectures in the context of visualization dataflow systems. Recent hardware advancements have greatly increased the...
DAC
2003
ACM
14 years 11 months ago
2003
ACM
The impact of technology scaling on three run-time leakage reduction techniques (Input Vector Control, Body Bias Control and Power Supply Gating) is evaluated by determining limit...
ICCS
2005
Springer
14 years 3 months ago
2005
Springer
Cray X1 Fortran and C/C++ compilers provide a number of loop transformations, notably vectorization and multistreaming, in order to exploit the multistreaming processor (MSP) hard...
RE
2008
Springer
13 years 9 months ago
2008
Springer
Abstract During the selection of commercial off-theshelf (COTS) products, mismatches encountered between stakeholders' requirements and features offered by COTS products are i...