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» Impact of Limited Memory Resources
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HPCA
2007
IEEE
14 years 2 months ago
An Adaptive Shared/Private NUCA Cache Partitioning Scheme for Chip Multiprocessors
The significant speed-gap between processor and memory and the limited chip memory bandwidth make last-level cache performance crucial for future chip multiprocessors. To use the...
Haakon Dybdahl, Per Stenström
ICMCS
2006
IEEE
105views Multimedia» more  ICMCS 2006»
14 years 1 months ago
Embedded Convolutional Face Finder
In this paper, a high-level optimization methodology is applied for the implementation of the well-known Convolutional Face Finder (CFF) algorithm for real-time applications on ce...
Sébastien Roux, Franck Mamalet, Christophe ...
ISLPED
2006
ACM
119views Hardware» more  ISLPED 2006»
14 years 1 months ago
Process variation aware cache leakage management
In a few technology generations, limitations of fabrication processes will make accurate design time power estimates a daunting challenge. Static leakage current which comprises a...
Ke Meng, Russ Joseph
DATE
2003
IEEE
97views Hardware» more  DATE 2003»
14 years 1 months ago
Enhancing Speedup in Network Processing Applications by Exploiting Instruction Reuse with Flow Aggregation
Instruction reuse is a microarchitectural technique that improves the execution time of a program by removing redundant computations at run-time. Although this is the job of an op...
G. Surendra, Subhasis Banerjee, S. K. Nandy
EUROSYS
2006
ACM
13 years 11 months ago
TCP offload through connection handoff
This paper presents a connection handoff interface between the operating system and the network interface. Using this interface, the operating system can offload a subset of TCP c...
Hyong-youb Kim, Scott Rixner