305 search results - page 32 / 61 » Impact of Parallel Workloads on NoC Architecture Design |
CLOUD
2010
ACM
14 years 21 days ago
2010
ACM
Over the last 10–15 years, our industry has developed and deployed many large-scale Internet services, from e-commerce to social networking sites, all facing common challenges i...
ISCA
2011
IEEE
12 years 11 months ago
2011
IEEE
Since 2005, processor designers have increased core counts to exploit Moore’s Law scaling, rather than focusing on single-core performance. The failure of Dennard scaling, to wh...
HPCA
2004
IEEE
14 years 8 months ago
2004
IEEE
Design of wakeup-free issue queues is becoming desirable due to the increasing complexity associated with broadcast-based instruction wakeup. The effectiveness of most wakeup-free...
IEEEPACT
2003
IEEE
14 years 27 days ago
2003
IEEE
We investigate the implementation of IP look-up for core routers using multiple microengines and a tailored memory hierarchy. The main architectural concerns are limiting the numb...
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
The designs of high-performance processor architectures are moving toward the integration of a large number of multiple processing cores on a single chip. The IBM Cyclops-64 (C64)...