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» Impact of Parallel Workloads on NoC Architecture Design
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PPOPP
2009
ACM
14 years 8 months ago
An efficient transactional memory algorithm for computing minimum spanning forest of sparse graphs
Due to power wall, memory wall, and ILP wall, we are facing the end of ever increasing single-threaded performance. For this reason, multicore and manycore processors are arising ...
Seunghwa Kang, David A. Bader
HPCA
2003
IEEE
14 years 7 months ago
Dynamic Voltage Scaling with Links for Power Optimization of Interconnection Networks
Originally developed to connect processors and memories in multicomputers, prior research and design of interconnection networks have focused largely on performance. As these netw...
Li Shang, Li-Shiuan Peh, Niraj K. Jha
CONEXT
2010
ACM
13 years 5 months ago
ICTCP: Incast Congestion Control for TCP in data center networks
TCP incast congestion happens in high-bandwidth and lowlatency networks, when multiple synchronized servers send data to a same receiver in parallel [15]. For many important data ...
Haitao Wu, Zhenqian Feng, Chuanxiong Guo, Yongguan...
HPCA
2006
IEEE
14 years 7 months ago
Software-hardware cooperative memory disambiguation
In high-end processors, increasing the number of in-flight instructions can improve performance by overlapping useful processing with long-latency accesses to the main memory. Buf...
Ruke Huang, Alok Garg, Michael C. Huang
ICS
2000
Tsinghua U.
13 years 11 months ago
Using complete system simulation to characterize SPECjvm98 benchmarks
Complete system simulation to understand the influence of architecture and operating systems on application execution has been identified to be crucial for systems design. While t...
Tao Li, Lizy Kurian John, Narayanan Vijaykrishnan,...