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» Impact of Technology Scaling in the Clock System Power
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INTEGRATION
2008
96views more  INTEGRATION 2008»
13 years 9 months ago
Implementation of a thermal management unit for canceling temperature-dependent clock skew variations
Thermal gradients across the die are becoming increasingly prominent as we scale further down into the sub-nanometer regime. While temperature was never a primary concern, its non...
Ashutosh Chakraborty, Karthik Duraisami, Ashoka Vi...
DSN
2004
IEEE
14 years 1 months ago
The Impact of Technology Scaling on Lifetime Reliability
The relentless scaling of CMOS technology has provided a steady increase in processor performance for the past three decades. However, increased power densities (hence temperature...
Jayanth Srinivasan, Sarita V. Adve, Pradip Bose, J...
MICRO
2003
IEEE
166views Hardware» more  MICRO 2003»
14 years 3 months ago
Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation
With increasing clock frequencies and silicon integration, power aware computing has become a critical concern in the design of embedded processors and systems-on-chip. One of the...
Dan Ernst, Nam Sung Kim, Shidhartha Das, Sanjay Pa...
ICCD
2002
IEEE
93views Hardware» more  ICCD 2002»
14 years 6 months ago
Impact of Scaling on the Effectiveness of Dynamic Power Reduction Schemes
Power is considered to be the major limiter to the design of more faster and complex processors in the near future. In order to address this challenge, a combination of process, c...
David Duarte, Narayanan Vijaykrishnan, Mary Jane I...
TPDS
2010
176views more  TPDS 2010»
13 years 8 months ago
Coupling-Based Internal Clock Synchronization for Large-Scale Dynamic Distributed Systems
This paper studies the problem of realizing a common software clock among a large set of nodes without an external time reference (i.e., internal clock synchronization), any centr...
Roberto Baldoni, Angelo Corsaro, Leonardo Querzoni...