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GI
2009
Springer
14 years 5 days ago
Challenges of Electronic CAD in the Nano Scale Era
: Future nano scale devices will expose different characteristics than todays silicon devices. While the exponential growth of non recurring expenses (NRE, mostly due to mask sets)...
Christian Hochberger, Andreas Koch
MICRO
2008
IEEE
208views Hardware» more  MICRO 2008»
14 years 1 months ago
Microarchitecture soft error vulnerability characterization and mitigation under 3D integration technology
— As semiconductor processing techniques continue to scale down, transient faults, also known as soft errors, are increasingly becoming a reliability threat to high-performance m...
Wangyuan Zhang, Tao Li
DATE
2010
IEEE
171views Hardware» more  DATE 2010»
14 years 20 days ago
Digital statistical analysis using VHDL
—Variations of process parameters have an important impact on reliability and yield in deep sub micron IC technologies. One methodology to estimate the influence of these effects...
Manfred Dietrich, Uwe Eichler, Joachim Haase
TCAD
2002
99views more  TCAD 2002»
13 years 7 months ago
Analysis of on-chip inductance effects for distributed RLC interconnects
This paper introduces an accurate analysis of on-chip inductance effects for distributed interconnects that takes the effect of both the series resistance and the output parasitic ...
Kaustav Banerjee, Amit Mehrotra
PRDC
2008
IEEE
14 years 1 months ago
On Modeling the Lifetime Reliability of Homogeneous Manycore Systems
Advancements in technology enable integration of a large number of cores on a single silicon die. At the same time, aggressive technology scaling has an ever-increasing adverse im...
Lin Huang, Qiang Xu