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» Impact of economics on compiler optimization
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DATE
2007
IEEE
72views Hardware» more  DATE 2007»
14 years 1 months ago
The impact of loop unrolling on controller delay in high level synthesis
Loop unrolling is a well-known compiler optimization that can lead to significant performance improvements. When used in High Level Synthesis (HLS) unrolling can affect the contr...
Srikanth Kurra, Neeraj Kumar Singh, Preeti Ranjan ...
ISCA
2007
IEEE
146views Hardware» more  ISCA 2007»
14 years 1 months ago
Hardware atomicity for reliable software speculation
Speculative compiler optimizations are effective in improving both single-thread performance and reducing power consumption, but their implementation introduces significant compl...
Naveen Neelakantam, Ravi Rajwar, Suresh Srinivas, ...
EXPERT
2011
131views more  EXPERT 2011»
12 years 10 months ago
Grid Monitoring and Market Risk Management
—With the rapid development of the electricity market, both grid and market operations need to be carefully coordinated and monitored in real time. This paper focuses on system m...
Yufan Guan, Mladen Kezunovic
CASES
2007
ACM
13 years 11 months ago
A simplified java bytecode compilation system for resource-constrained embedded processors
Embedded platforms are resource-constrained systems in which performance and memory requirements of executed code are of critical importance. However, standard techniques such as ...
Carmen Badea, Alexandru Nicolau, Alexander V. Veid...
CIDR
2007
116views Algorithms» more  CIDR 2007»
13 years 8 months ago
Managing Query Compilation Memory Consumption to Improve DBMS Throughput
While there are known performance trade-offs between database page buffer pool and query execution memory allocation policies, little has been written on the impact of query compi...
Boris Baryshnikov, Cipri Clinciu, Conor Cunningham...