6054 search results - page 1101 / 1211 » Implementation of Andorra-based Languages |
VLSID
2006
IEEE
14 years 3 months ago
2006
IEEE
This tutorial focuses on advanced techniques to cope with the complexity of designing modern digital chips which are complete systems often containing multiple processors, complex...
ASPLOS
2006
ACM
14 years 3 months ago
2006
ACM
Worms, viruses, and other malware can be ticking bombs counting down to a specific time, when they might, for example, delete files or download new instructions from a public we...
ASPLOS
2006
ACM
14 years 3 months ago
2006
ACM
While hardware instruction caches are present in virtually all general-purpose and high-performance microprocessors today, many embedded processors use SRAM or scratchpad memories...
ASPLOS
2006
ACM
14 years 3 months ago
2006
ACM
Redundant threading architectures duplicate all instructions to detect and possibly recover from transient faults. Several lighter weight Partial Redundant Threading (PRT) archite...
ASPLOS
2006
ACM
14 years 3 months ago
2006
ACM
Current taint checking architectures monitor tainted data usage mainly with control transfer instructions. An alarm is raised once the program counter becomes tainted. However, su...