185 search results - page 10 / 37 » Implementation of Gabor-Type Filters on Field Programmable G... |
DFT
2005
IEEE
14 years 1 months ago
2005
IEEE
SRAM-based Field Programmable Gate Arrays (FPGAs) are very susceptible to Single Event Upsets (SEUs) that may have dramatic effects on the circuits they implement. In this paper w...
IPPS
1999
IEEE
13 years 12 months ago
1999
IEEE
This paperpresents new resultson anapproach for solvingsatisfiability problems (SAT), that is, creating a logic circuit that is specialized to solve each problem instance on Field ...
FCCM
2009
IEEE
13 years 11 months ago
2009
IEEE
Most high-speed Internet Protocol (IP) lookup implementations use tree traversal and pipelining. Due to the available on-chip memory and the number of I/O pins of Field Programmab...
INTEGRATION
2008
13 years 6 months ago
2008
This paper presents a Viterbi Decoder (VD) architecture for a programmable data transmission system, implemented using a Field Programmable Gate Array (FPGA) device. This VD has b...
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
Reconfigurable computing applications have traditionally had the exclusive use of the field programmable gate array, primarily because the logic densities of the available devices...