Sciweavers

56 search results - page 4 / 12
» Implementing Application-Specific Cache-Coherence Protocols ...
Sort
View
FPL
2006
Springer
125views Hardware» more  FPL 2006»
13 years 11 months ago
Application-Specific Memory Interleaving for FPGA-Based Grid Computations: A General Design Technique
Many compute-intensive applications generate single result values by accessing clusters of nearby points in grids of one, two, or more dimensions. Often, the performance of FGPA i...
Tom Van Court, Martin C. Herbordt
ASAP
1997
IEEE
155views Hardware» more  ASAP 1997»
13 years 11 months ago
An Approach for Quantitative Analysis of Application-Specific Dataflow Architectures
In this paper we present an approach for quantitative analysis of application-specific dataflow architectures. The approach allows the designer to rate design alternatives in a qu...
Bart Kienhuis, Ed F. Deprettere, Kees A. Vissers, ...
ISCA
2003
IEEE
104views Hardware» more  ISCA 2003»
14 years 25 days ago
Token Coherence: Decoupling Performance and Correctness
Many future shared-memory multiprocessor servers will both target commercial workloads and use highly-integrated “glueless” designs. Implementing low-latency cache coherence i...
Milo M. K. Martin, Mark D. Hill, David A. Wood
ERSA
2006
124views Hardware» more  ERSA 2006»
13 years 9 months ago
RTOS-Based Hardware Software Communications and Configuration Management in the Context of a Smart Camera
This paper deals with the question of task communication and configuration dynamic management in the context of hardware and software implementations. Our approach is based on a c...
Yvan Eustache, Jean-Philippe Diguet, Milad El Khod...
FCCM
2007
IEEE
108views VLSI» more  FCCM 2007»
14 years 1 months ago
Configurable Transactional Memory
Programming efficiency of heterogeneous concurrent systems is limited by the use of lock-based synchronization mechanisms. Transactional memories can greatly improve the programmi...
Christoforos Kachris, Chidamber Kulkarni