49 search results - page 3 / 10 » Implementing LDPC Decoding on Network-on-Chip |
SOCC
2008
IEEE
14 years 2 months ago
2008
IEEE
Abstract— In this paper we present an efficient system-onchip implementation of a 1-Gbps LDPC decoder for 4G (or beyond 3G) wireless standards. The decoder has a scalable datapa...
TSP
2008
13 years 7 months ago
2008
Stochastic decoding is a new approach to iterative decoding on graphs. This paper presents a hardware architecture for fully parallel stochastic low-density parity-check (LDPC) dec...
SIPS
2007
IEEE
14 years 1 months ago
2007
IEEE
Stochastic decoding is a new alternative method for low complexity decoding of error-correcting codes. This paper presents the first hardware architecture for stochastic decoding...
GLOBECOM
2009
IEEE
14 years 2 months ago
2009
IEEE
—One of the key factors underlying the popularity of Low-density parity-check (LDPC) code is its iterative decoding algorithm that is amenable to efficient hardware implementati...
ICCD
2006
IEEE
14 years 4 months ago
2006
IEEE
— A reduced complexity LDPC decoding method is presented that dramatically reduces wire interconnect complexity, which is a major issue in LDPC decoders. The proposed Split-Row m...