1688 search results - page 22 / 338 » Implementing Optimizations at Decode Time |
INTEGRATION
2008
13 years 6 months ago
2008
This paper presents a Viterbi Decoder (VD) architecture for a programmable data transmission system, implemented using a Field Programmable Gate Array (FPGA) device. This VD has b...
ICCAD
2002
IEEE
14 years 4 months ago
2002
IEEE
This paper describes a dynamic voltage and frequency scaling (DVFS) technique for MPEG decoding to reduce the energy consumption while maintaining a quality of service (QoS) constr...
FIDJI
2003
Springer
14 years 1 months ago
2003
Springer
The popular slogan ”write once, run anywhere” effectively renders the expressive capabilities of the Java programming framework for developing, deploying, and reusing target-i...
CODES
2005
IEEE
14 years 1 months ago
2005
IEEE
High performance microprocessors are designed with generalpurpose applications in mind. When it comes to embedded applications, these architectures typically perform controlintens...
ICCS
2007
Springer
13 years 11 months ago
2007
Springer
Abstract. Interpolating scattered data points is a problem of wide ranging interest. One of the most popular interpolation methods in geostatistics is ordinary kriging. The price f...