857 search results - page 154 / 172 » Implementing a STARI chip |
PPOPP
2006
ACM
14 years 1 months ago
2006
ACM
Applications need to become more concurrent to take advantage of the increased computational power provided by chip level multiprocessing. Programmers have traditionally managed t...
DATE
2003
IEEE
14 years 20 days ago
2003
IEEE
ng precision of abstract SystemC models using the SystemC Verification Standard Franco Carbognani1 , Christopher K. Lennard2 , C. Norris Ip3 , Allan Cochrane2 , Paul Bates2 1 Caden...
ISLPED
2003
ACM
14 years 18 days ago
2003
ACM
Ever shrinking device sizes and innovative micro-architectural and circuit design techniques have made it possible to have multi-million transistor systems running at multi-gigahe...
CADE
1998
Springer
13 years 11 months ago
1998
Springer
Abstract. We present the first implementation of a theorem prover running on a smart card. The prover is written in Java and implements a dual tableau calculus. Due to the limited ...
FCCM
2004
IEEE
13 years 11 months ago
2004
IEEE
We describe a flexible hardware encoder for regular and irregular low-density parity-check (LDPC) codes. Although LDPC codes achieve achieve better performance and lower decoding ...