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» Implementing a STARI chip
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IPPS
2005
IEEE
14 years 28 days ago
Predicting Cache Space Contention in Utility Computing Servers
The need to provide performance guarantee in high performance servers has long been neglected. Providing performance guarantee in current and future servers is difficult because ï...
Yan Solihin, Fei Guo, Seongbeom Kim
ISLPED
2005
ACM
100views Hardware» more  ISLPED 2005»
14 years 27 days ago
A tunable bus encoder for off-chip data buses
Off-Chip buses constitute a significant portion of the total system power in embedded systems. Past research has focused on encoding contiguous bit positions in data values to red...
Dinesh C. Suresh, Banit Agrawal, Jun Yang 0002, Wa...
SBCCI
2005
ACM
98views VLSI» more  SBCCI 2005»
14 years 27 days ago
Mapping embedded systems onto NoCs: the traffic effect on dynamic energy estimation
This work addresses the problem of application mapping in networks-on-chip (NoCs). It explores the importance of characterizing network traffic to effectively predict NoC energy c...
José Carlos S. Palma, César A. M. Ma...
LCPC
2005
Springer
14 years 25 days ago
Manipulating MAXLIVE for Spill-Free Register Allocation
Abstract. Many embedded systems use single-chip microcontrollers which have no on-chip RAM. In such a system, the processor registers must hold all live data values. Nanocontroller...
Shashi Deepa Arcot, Henry G. Dietz, Sarojini Priya...
ISLPED
2004
ACM
123views Hardware» more  ISLPED 2004»
14 years 23 days ago
An efficient voltage scaling algorithm for complex SoCs with few number of voltage modes
Increasing demand for larger high-performance applications requires developing more complex systems with hundreds of processing cores on a single chip. To allow dynamic voltage sc...
Bita Gorjiara, Nader Bagherzadeh, Pai H. Chou