857 search results - page 36 / 172 » Implementing a STARI chip |
BMCBI
2008
13 years 10 months ago
2008
Background: During the past decade, many software packages have been developed for analysis and visualization of various types of microarrays. We have developed and maintained the...
DAC
2001
ACM
14 years 10 months ago
2001
ACM
Using on-chip interconnection networks in place of ad-hoc global wiring structures the top level wires on a chip and facilitates modular design. With this approach, system modules...
DATE
2009
IEEE
14 years 4 months ago
2009
IEEE
—Networks-on-Chip (NoCs) have appeared as design strategy to overcome the limitations, in terms of scalability, efficiency, and power consumption of current buses. In this paper...
DAMON
2007
Springer
14 years 3 months ago
2007
Springer
Chip multiprocessors (CMPs) present new opportunities for improving database performance on large queries. Because CMPs often share execution, cache, or bandwidth resources among ...
SAMOS
2007
Springer
14 years 3 months ago
2007
Springer
This paper presents a configurable base architecture tailorable for different applications. It allows simple and rapid way to evaluate and prototype large Multi-Processor System-on...