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CSREAESA
2006
13 years 8 months ago
Design and Implementation of SoPC with Multi-Bus on a Chip
SoPC (System on a Programmable Chip) is one important kind of SoC solution based on PLD (Programmable Logic Device). At the same time, PBD (Platform-based Design) has become popul...
Fangjun Jian, Jizhong Han, Chengde Han, Qin Zhang,...
ISCA
2008
IEEE
114views Hardware» more  ISCA 2008»
14 years 1 months ago
Globally-Synchronized Frames for Guaranteed Quality-of-Service in On-Chip Networks
Future chip multiprocessors (CMPs) may have hundreds to thousands of threads competing to access shared resources, and will require quality-of-service (QoS) support to improve sys...
Jae W. Lee, Man Cheuk Ng, Krste Asanovic
ICIP
1994
IEEE
14 years 8 months ago
Full Custom VLSI Implementation of High-Speed 2-D DCT/IDCT Chip
In this paper we present a full-custom VLSI design of highspeed 2-D DCT/IDCT processor based on the new class of time-recursive algorithms and architectures which has never been i...
Vishnu Srinivasan, K. J. Ray Liu
BMCBI
2010
91views more  BMCBI 2010»
13 years 6 months ago
Washing scaling of GeneChip microarray expression
Background: Post-hybridization washing is an essential part of microarray experiments. Both the quality of the experimental washing protocol and adequate consideration of washing ...
Hans Binder, Knut Krohn, Conrad J. Burden
ISCA
2010
IEEE
229views Hardware» more  ISCA 2010»
13 years 5 months ago
Understanding sources of inefficiency in general-purpose chips
Due to their high volume, general-purpose processors, and now chip multiprocessors (CMPs), are much more cost effective than ASICs, but lag significantly in terms of performance a...
Rehan Hameed, Wajahat Qadeer, Megan Wachs, Omid Az...