Transactional memory (TM) provides an easy-to-use and high-performance parallel programming model for the upcoming chip-multiprocessor systems. Several researchers have proposed a...
JaeWoong Chung, Hassan Chafi, Chi Cao Minh, Austen...
We introduce the first approach that can actively control multiple hardware intellectual property (IP) cores used in an integrated circuit (IC). The IP rights owner(s) can remotel...
—Targeting the operating system kernel, the core of trust in a system, kernel rootkits are able to compromise the entire system, placing it under malicious control, while eluding...
Junghwan Rhee, Ryan Riley, Dongyan Xu, Xuxian Jian...
— A procedure for synthesizing multiple-input translinear element (MITE) networks that implement a given system of translinear–loop equations (STLE) is presented. The minimum n...
Shyam Subramanian, David V. Anderson, Paul E. Hasl...
- The novel CORDIC-based architecture of the these weights (combiner unit). The implementation of the Triangular Systolic Array for QRD of large size complex combiner unit is rathe...
Alexander Maltsev, V. Pestretsov, Roman Maslenniko...