99 search results - page 12 / 20 » Implementing and evaluating nested parallel transactions in ... |
IPPS
2009
IEEE
14 years 2 months ago
2009
IEEE
Abstract—Widespread emergence of multicore processors will spur development of parallel applications, exposing programmers to degrees of hardware concurrency hitherto unavailable...
CODES
2011
IEEE
12 years 7 months ago
2011
IEEE
Two overriding concerns in the development of embedded MPSoCs are ease of programming and hardware complexity. In this paper we present SoC-TM, an integrated HW/SW solution for tr...
ISCA
2006
IEEE
14 years 1 months ago
2006
IEEE
Transactional Memory (TM) simplifies parallel programming by allowing for parallel execution of atomic tasks. Thus far, TM systems have focused on implementing transactional stat...
SPAA
2009
ACM
14 years 8 months ago
2009
ACM
Transactional memory (TM) eliminates many problems associated with lock-based synchronization. Over recent years, much progress has been made in software and hardware implementati...
ICS
2009
Tsinghua U.
13 years 5 months ago
2009
Tsinghua U.
In the search for high performance, most transactional memory (TM) systems execute atomic blocks concurrently and must thus be prepared for data conflicts. The TM system must then...