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» Implementing the scale vector-thread processor
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WSC
1998
13 years 9 months ago
Parallel Implementation of a Molecular Dynamics Simulation Program
We have taken a NIST molecular dynamics simulation program (md3), which was configured as a single sequential process running on a CRAY C90 vector supercomputer, and parallelized ...
Alan Mink, Christophe Bailly
HPCA
2007
IEEE
14 years 8 months ago
A Scalable, Non-blocking Approach to Transactional Memory
Transactional Memory (TM) provides mechanisms that promise to simplify parallel programming by eliminating the need for locks and their associated problems (deadlock, livelock, pr...
Hassan Chafi, Jared Casper, Brian D. Carlstrom, Au...
PPOPP
2010
ACM
14 years 4 months ago
Scaling LAPACK panel operations using parallel cache assignment
In LAPACK many matrix operations are cast as block algorithms which iteratively process a panel using an unblocked algorithm and then update a remainder matrix using the high perf...
Anthony M. Castaldo, R. Clint Whaley
DAC
2004
ACM
14 years 8 months ago
Off-chip latency-driven dynamic voltage and frequency scaling for an MPEG decoding
This paper describes a dynamic voltage and frequency scaling (DVFS) technique for MPEG decoding to reduce the energy consumption using the computational workload decomposition. Th...
Kihwan Choi, Ramakrishna Soma, Massoud Pedram
ICPPW
2009
IEEE
13 years 5 months ago
A Scalable Parallel Approach for Peptide Identification from Large-Scale Mass Spectrometry Data
Identifying peptides, which are short polymeric chains of amino acid residues in a protein sequence, is of fundamental importance in systems biology research. The most popular appr...
Gaurav Ramesh Kulkarni, Ananth Kalyanaraman, Willi...