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DAC
1996
ACM
13 years 11 months ago
Optimal Clock Skew Scheduling Tolerant to Process Variations
1- A methodology is presented in this paper for determining an optimal set of clock path delays for designing high performance VLSI/ULSI-based clock distribution networks. This met...
José Luis Neves, Eby G. Friedman
AICCSA
2006
IEEE
168views Hardware» more  AICCSA 2006»
14 years 1 months ago
Power Efficient Algorithms for Computing Fast Fourier Transform over Wireless Sensor Networks
Collaborative signal processing is one of the most promising applications that are currently being investigated for sensor networks. In this paper, we use FFT computation as a veh...
Turkmen Canli, Ajay K. Gupta, Ashfaq A. Khokhar
CONCUR
2012
Springer
11 years 10 months ago
Avoiding Shared Clocks in Networks of Timed Automata
Networks of timed automata (NTA) are widely used to model distributed real-time systems. Quite often in the literature, the automata are allowed to share clocks. This is a problem ...
Sandie Balaguer, Thomas Chatain
CORR
2008
Springer
113views Education» more  CORR 2008»
13 years 7 months ago
Self-Stabilizing Pulse Synchronization Inspired by Biological Pacemaker Networks
We define the "Pulse Synchronization" problem that requires nodes to achieve tight synchronization of regular pulse events, in the settings of distributed computing syste...
Ariel Daliot, Danny Dolev, Hanna Parnas
DAC
2008
ACM
14 years 8 months ago
Type-matching clock tree for zero skew clock gating
Clock skew minimization is always very important in the clock tree synthesis. Due to clock gating, the clock tree may include different types of logic gates, e.g., AND gates, OR g...
Chia-Ming Chang, Shih-Hsu Huang, Yuan-Kai Ho, Jia-...